Lessons Learned from Deploying Deep Learning at Scale
EETimes - Eta's Ultra Low-Power Machine Learning Platform
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Machine Learning in Energy - ADG Efficiency
ASIC Design Services | Microsemi
Hardware for Deep Learning. Part 4: ASIC | by Grigory Sapunov | Intento
The Definitive Guide to Deep Learning with GPUs | cnvrg.io
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Are ASIC chips going to be the future of AI? | ASIC chips
Arch-Net: A Family Of Neural Networks Built With Operators To Bridge The Gap Between Computer Architecture of ASIC Chips And Neural Network Model Architectures - MarkTechPost
AI 2.0 - Episode #1, Introduction | Cisco Tech Blog
My take on the Gartner Hype Cycle | by Jens Møllerhøj | Medium
Intel Speeds AI Development, Deployment and Performance with New Class of AI Hardware from Cloud to Edge | Business Wire
FPGA Based Deep Learning Accelerators Take on ASICs
Easing the Effort: Mipsology Accelerates ML with Zebra FPGA IP - News
Why ASICs Are Becoming So Widely Popular For AI
Deep Learning And The Future
FPGA chips are coming on fast in the race to accelerate AI | VentureBeat
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Deep Learning Has Hit a Wall, Intel's Rao Says
How to make your own deep learning accelerator chip! | by Manu Suryavansh | Towards Data Science
Tensor Processing Unit - Wikipedia
Deep Learning Accelerators Foundation IP| DesignWare IP| Synopsys
